In this article, we present a novel impedance measurement circuit with a wideband coverage up to 1 MHz. A frequency divider technique is applied to downshift the input frequency of the xor input and at the same time adding 90° phase shift. This technique helps to avoid the typically dead-zone problem in xor-based phase detectors (PDs), still maintaining 10 mV/deg of phase sensitivity. The proposed circuit implements the polar demodulation structure with a reference path providing reference timing, mitigating synchronization issues with the transmitter. To counteract both the delay in the comparator and the instrumentation amplifier (IA) non-linear characteristics, a reference magnitude measurement pathway has been incorporated into the design. This architectural enhancement ensures that measurement precision is primarily constrained by component matching variations within the circuit itself. The sampling scheme includes a current-controlled impedance analysis that includes a dynamic inverting opamp configuration in order to maintain the ratio comparable to the reference signal. The circuit while covering the measurement frequency range from 10 Hz to 1 MHz and exhibits a maximum modulus and phase errors of 11% and 0.51°, respectively.
A Novel Polar-Demodulator-Based Electronic Interface for Bioimpedance Spectroscopy With Enhanced Phase Detection and Reduced Dead Zone
Zompanti, Alessandro;Santonico, Marco;Pennazza, Giorgio
2025-01-01
Abstract
In this article, we present a novel impedance measurement circuit with a wideband coverage up to 1 MHz. A frequency divider technique is applied to downshift the input frequency of the xor input and at the same time adding 90° phase shift. This technique helps to avoid the typically dead-zone problem in xor-based phase detectors (PDs), still maintaining 10 mV/deg of phase sensitivity. The proposed circuit implements the polar demodulation structure with a reference path providing reference timing, mitigating synchronization issues with the transmitter. To counteract both the delay in the comparator and the instrumentation amplifier (IA) non-linear characteristics, a reference magnitude measurement pathway has been incorporated into the design. This architectural enhancement ensures that measurement precision is primarily constrained by component matching variations within the circuit itself. The sampling scheme includes a current-controlled impedance analysis that includes a dynamic inverting opamp configuration in order to maintain the ratio comparable to the reference signal. The circuit while covering the measurement frequency range from 10 Hz to 1 MHz and exhibits a maximum modulus and phase errors of 11% and 0.51°, respectively.| File | Dimensione | Formato | |
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