Techniques for Automatic Program Comprehension can play a crucial role in overcoming limitations of existing tools for the automatic parallelization of programs for distributed-memory architectures. Uses of a program recognition-based parallelization procedure could range from the automatic selection of a data distribution, via the automatic selection of sequences of optimizing transformations of the sequential code, via the code replacement with optimized parallel libraries, up to the automatic selection of the parallel execution model that is best suited to the algorithm to be parallelized and to the target parallel architecture. In this paper is presented the implementation of a prototype tool for the recognition of Parallelizable Algorithmic Patterns (PAP Recognizer), which has been integrated into the Vienna Fortran Compilation System, an interactive compilation system for scalable architectures. The distinctive features of the approach are discussed and the way the recognizer works is described with respect to a working example.

PAP Recognizer: A tool for automatic recognition of parallelizable patterns

Iannello G
1996-01-01

Abstract

Techniques for Automatic Program Comprehension can play a crucial role in overcoming limitations of existing tools for the automatic parallelization of programs for distributed-memory architectures. Uses of a program recognition-based parallelization procedure could range from the automatic selection of a data distribution, via the automatic selection of sequences of optimizing transformations of the sequential code, via the code replacement with optimized parallel libraries, up to the automatic selection of the parallel execution model that is best suited to the algorithm to be parallelized and to the target parallel architecture. In this paper is presented the implementation of a prototype tool for the recognition of Parallelizable Algorithmic Patterns (PAP Recognizer), which has been integrated into the Vienna Fortran Compilation System, an interactive compilation system for scalable architectures. The distinctive features of the approach are discussed and the way the recognizer works is described with respect to a working example.
1996
0-8186-7283-8
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.12610/15692
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